问题描述
我正在尝试编写代码来监视Zynq ZCU106 UltRascale +板上的L2缓存。具体来说，我想要L2D_Cache，L2D_Cache_Refill，L2D和Cache_WB。由于ZCU106是ARM处理器，因此我一直在使用以下网站：https://developer.arm.com/documentation/ddi0500/d/performance-monitor-unit/pmu-functional-description?lang=en 帮助我找到寄存器。使用它，我能够找到以下信息：
/**
* Registers for enabling event counters
*/
#define PMCR 0x00003E04
//#define PMCEID0 0x00003E20
/**
* This block have performance monitor event type register. These are the relative address
*/
#define EVTYPER0_EL0 0x00000400 //performance monitor event type register for event 0
#define EVTYPER1_EL0 0x00000404 //performance monitor event type register for event 1
#define EVTYPER2_EL0 0x00000408 //performance monitor event type register for event 2
#define EVTYPER3_EL0 0x0000040C //performance monitor event type register for event 3
#define EVTYPER4_EL0 0x00000410 //performance monitor event type register for event 4
#define EVTYPER5_EL0 0x00000414 //performance monitor event type register for event 5
/**
* This block has the event counter. Relative addresses
* Read the information from these registers
*/
#define PMEVCNTR0 0x00003000 //event counter #0
#define PMEVCNTR1 0x00003004 //Event counter #1
#define PMEVCNTR2 0x00003008 //Event counter #2
#define PMEVCNTR3 0x0000300C //Event counter #3
#define PMEVCNTR4 0x00003010 //Event counter #4
#define PMEVCNTR5 0x00003014 //Event counter #5
/**
* This block has event ID for some of the events we want to monitor
*/
#define L2D_CACHE 0x16
#define L2D_CACHE_REFILL 0x17
#define L2D_CACHE_WB 0x18
我被困在那里，因为我似乎找不到如何启用计数器并将它们设置为正确事件的方法。任何人都有建议/知道我应该使用什么功能？我一直在使用Xil_Out32（）来进行大多数启用。
解决方法
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