问题描述
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我有电路原理图的网表(子电路集合),通常是由一些SPICE模拟器创建的。它通常具有层次结构(顶级子电路调用或实例化不同的子电路,并通过引脚定义它们之间的一些连接性)。样本网表如下所示:
subckt AN2D0 A1 A2 VDD VSS Z
M_u2 (net5 A2 VDD VDD) pch
M_u1 (net5 A1 VDD VDD) pch
M_u3 (Z net5 VDD VDD) pch
M_u4 (net17 A2 VSS VSS) nch
M_u2 (Z net5 VSS VSS) nch
ends AN2D0
subckt LS_RX_CONTROLLER VDD VSS burst_start_or_sys burst_start_out pd pd_pwm_det pd_pwm_det_TII std_by std_by_or_sys sys_en sys_out
I2 (burst_start_or_sys std_by VDD VSS burst_start_out) AN2D2
I1 (net22 std_by_bar VDD VSS sys_out) AN2D2
I5 (net022 pd VDD VSS pd_pwm_det) OR2D2
I10 (net026 pd VDD VSS std_by_or_sys) NR2D2
I9 (sys_en std_by VDD VSS net026) NR2D0
I6 (std_by VDD VSS std_by_bar) INVD0
I3 (pd_pwm_det_TII net037 VDD VSS net022) OR2D0
I11 (sys_en std_by VDD VSS net037) OR2D0
I0 (burst_start_or_sys sys_en VDD VSS net22) AN2D0
ends LS_RX_CONTROLLER
现在,可以在不同的层次结构中实例化相同的子电路。每个被调用的子电路都在调用子电路之前定义。这种图称为有向无环图。我已经从网表中创建了一个自引用HASH表,以节省空间。如果某个子电路正在调用某个子电路实例,那么它将指向该引脚。在最后的层次结构中,我们将获得MOSFET D或S或G或B节点(因为已经定义了AN2D0子电路)。如果从层次结构(除了调用子电路,例如net5)引出到父调用子电路的任何网络(实例引脚之间的连接),它将被称为pin(例如Z),并将始终列在当前子电路定义行中紧随其后的名称(子代号AN2D0 A1 A2 VDD VSS Z)。我创建了一个哈希散列。
GRAPH --> subckt1--->p1
p2
net1
net2
subckt2--->p1
p2
net1
net2
subckt3--->p1 ---->I1.subckt1.p1--->pointing to value of p1 key of subckt1.
I2.subckt1.p2
p2
net1
net2
在当前情况下,GRAPH看起来像:
the name of subcircuit-->AN2D0
name of pin or net-->Z
name of instant connected to it-->M_u2.nch.D
name of instant connected to it-->M_u3.pch.D
name of pin or net-->VDD
name of instant connected to it-->M_u1.pch.S
name of instant connected to it-->M_u1.pch.B
name of instant connected to it-->M_u2.pch.S
name of instant connected to it-->M_u3.pch.S
name of instant connected to it-->M_u2.pch.B
name of instant connected to it-->M_u3.pch.B
name of pin or net-->A1
name of instant connected to it-->M_u3.nch.G
name of instant connected to it-->M_u1.pch.G
name of pin or net-->VSS
name of instant connected to it-->M_u2.nch.S
name of instant connected to it-->M_u4.nch.B
name of instant connected to it-->M_u2.nch.B
name of instant connected to it-->M_u3.nch.B
name of instant connected to it-->M_u4.nch.S
name of pin or net-->net5
name of instant connected to it-->M_u3.nch.D
name of instant connected to it-->M_u3.pch.G
name of instant connected to it-->M_u1.pch.D
name of instant connected to it-->M_u2.pch.D
name of instant connected to it-->M_u2.nch.G
name of pin or net-->A2
name of instant connected to it-->M_u4.nch.G
name of instant connected to it-->M_u2.pch.G
name of pin or net-->net17
name of instant connected to it-->M_u3.nch.S
name of instant connected to it-->M_u4.nch.D
the name of subcircuit-->LS_RX_CONTROLLER
name of pin or net-->burst_start_or_sys
name of instant connected to it-->I2.AN2D2.A1
M_u3.nch.G
M_u1.pch.G
name of instant connected to it-->I0.AN2D0.A1
M_u3.nch.G
M_u1.pch.G
name of pin or net-->burst_start_out
name of instant connected to it-->I2.AN2D2.Z
M_u2.nch.D
M_u3.pch.D
name of pin or net-->net037
name of instant connected to it-->I11.OR2D0.Z
M_u2.nch.D
M_u3.pch.D
name of instant connected to it-->I3.OR2D0.A2
M_u3.nch.G
M_u1.pch.G
name of pin or net-->net026
name of instant connected to it-->I10.NR2D2.A1
M_u4.nch.G
M_u2.pch.G
name of instant connected to it-->I9.NR2D0.ZN
M_u3.nch.D
M_u2.pch.D
M_u4.nch.D
name of pin or net-->std_by
name of instant connected to it-->I9.NR2D0.A2
M_u3.nch.G
M_u1.pch.G
name of instant connected to it-->I6.INVD0.I
M_u3.pch.G
M_u2.nch.G
name of instant connected to it-->I2.AN2D2.A2
M_u4.nch.G
M_u2.pch.G
name of instant connected to it-->I11.OR2D0.A2
M_u3.nch.G
M_u1.pch.G
name of pin or net-->sys_en
name of instant connected to it-->I11.OR2D0.A1
M_u4.nch.G
M_u2.pch.G
name of instant connected to it-->I0.AN2D0.A2
M_u4.nch.G
M_u2.pch.G
name of instant connected to it-->I9.NR2D0.A1
M_u4.nch.G
M_u2.pch.G
name of pin or net-->VDD
name of instant connected to it-->I2.AN2D2.VDD
M_u1.pch.S
M_u1.pch.B
M_u2.pch.S
M_u3.pch.S
M_u2.pch.B
M_u3.pch.B
name of instant connected to it-->I10.NR2D2.VDD
M_u1.pch.S
M_u1.pch.B
M_u2.pch.B
name of instant connected to it-->I0.AN2D0.VDD
M_u1.pch.S
M_u1.pch.B
M_u2.pch.S
M_u3.pch.S
M_u2.pch.B
M_u3.pch.B
name of instant connected to it-->I6.INVD0.VDD
M_u3.pch.S
M_u3.pch.B
name of instant connected to it-->I9.NR2D0.VDD
M_u1.pch.S
M_u1.pch.B
M_u2.pch.B
name of instant connected to it-->I1.AN2D2.VDD
M_u1.pch.S
M_u1.pch.B
M_u2.pch.S
M_u3.pch.S
M_u2.pch.B
M_u3.pch.B
name of instant connected to it-->I11.OR2D0.VDD
M_u1.pch.S
M_u1.pch.B
M_u3.pch.S
M_u2.pch.B
M_u3.pch.B
name of instant connected to it-->I3.OR2D0.VDD
M_u1.pch.S
M_u1.pch.B
M_u3.pch.S
M_u2.pch.B
M_u3.pch.B
name of instant connected to it-->I5.OR2D2.VDD
M_u1.pch.S
M_u1.pch.B
M_u3.pch.S
M_u2.pch.B
M_u3.pch.B
name of pin or net-->sys_out
name of instant connected to it-->I1.AN2D2.Z
M_u2.nch.D
M_u3.pch.D
name of pin or net-->net022
name of instant connected to it-->I3.OR2D0.Z
M_u2.nch.D
M_u3.pch.D
name of instant connected to it-->I5.OR2D2.A1
M_u4.nch.G
M_u2.pch.G
name of pin or net-->pd_pwm_det_TII
name of instant connected to it-->I3.OR2D0.A1
M_u4.nch.G
M_u2.pch.G
name of pin or net-->std_by_or_sys
name of instant connected to it-->I10.NR2D2.ZN
M_u3.nch.D
M_u2.pch.D
M_u4.nch.D
name of pin or net-->net22
name of instant connected to it-->I0.AN2D0.Z
M_u2.nch.D
M_u3.pch.D
name of instant connected to it-->I1.AN2D2.A1
M_u3.nch.G
M_u1.pch.G
name of pin or net-->pd
name of instant connected to it-->I10.NR2D2.A2
M_u3.nch.G
M_u1.pch.G
name of instant connected to it-->I5.OR2D2.A2
M_u3.nch.G
M_u1.pch.G
name of pin or net-->std_by_bar
name of instant connected to it-->I6.INVD0.ZN
M_u2.nch.D
M_u3.pch.D
name of instant connected to it-->I1.AN2D2.A2
M_u4.nch.G
M_u2.pch.G
name of pin or net-->VSS
name of instant connected to it-->I11.OR2D0.VSS
M_u3.nch.S
M_u2.nch.S
M_u4.nch.B
M_u2.nch.B
M_u3.nch.B
M_u4.nch.S
name of instant connected to it-->I5.OR2D2.VSS
M_u3.nch.S
M_u4.nch.B
M_u2.nch.S
M_u2.nch.B
M_u3.nch.B
M_u4.nch.S
name of instant connected to it-->I3.OR2D0.VSS
M_u3.nch.S
M_u2.nch.S
M_u4.nch.B
M_u2.nch.B
M_u3.nch.B
M_u4.nch.S
name of instant connected to it-->I6.INVD0.VSS
M_u2.nch.S
M_u2.nch.B
name of instant connected to it-->I0.AN2D0.VSS
M_u2.nch.S
M_u4.nch.B
M_u2.nch.B
M_u3.nch.B
M_u4.nch.S
name of instant connected to it-->I2.AN2D2.VSS
M_u2.nch.S
M_u4.nch.B
M_u2.nch.B
M_u3.nch.B
M_u4.nch.S
name of instant connected to it-->I1.AN2D2.VSS
M_u2.nch.S
M_u4.nch.B
M_u2.nch.B
M_u3.nch.B
M_u4.nch.S
name of instant connected to it-->I9.NR2D0.VSS
M_u3.nch.S
M_u4.nch.B
M_u3.nch.B
M_u4.nch.S
name of instant connected to it-->I10.NR2D2.VSS
M_u3.nch.S
M_u4.nch.B
M_u3.nch.B
M_u4.nch.S
name of pin or net-->pd_pwm_det
name of instant connected to it-->I5.OR2D2.Z
M_u2.nch.D
M_u3.pch.D
此后,将给出一个子电路名称和一个相同的引脚,可以从任何级别的层次结构中实例化该子电路名称,并且我们必须找到父电路,即追溯父电路,直到将网络拉为引脚为止。然后向后压所有叶子(MOSFET D或G或S或B引脚)。
请提出哪种算法最适合此算法,以及将其存储在自引用哈希表中是否有效。
解决方法
以我的经验,最好使用索引过程来生成图形中节点的唯一标识,然后创建平面散列,其中键是此id。使用ID进行链接。例如:
a => b,b => c,c => d,d => a
转换成
%graph = (
a => { content => ...,linksto => [ b ] },b => { content => ...,linksto => [ c ] },c => { content => ...,linksto => [ d ] },d => { content => ...,linksto => [ a ] }
);